CN0036: Precision, Bipolar Configuration for the AD5426/AD5432/AD5443 8-Bit to12-Bit DACs

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OVERVIEW

Circuit Note PDF, 09/2010 (pdf, 94 kB)
Benefits & Features
  • High precision converters applications
  • High DC performance
  • Bipolar output deisgns
Products Used
    Applications: 
  • Electronic Test & Measurement
Design Resources
Device Drivers
Software, such as C code and/or FPGA code, used to communicate with a component's digital interface.
FPGA HDL

CIRCUIT FUNCTION AND BENEFITS

This circuit is a bipolar, precision dc DAC configuration that employs a precision multiplying DAC and a low noise operational amplifier (op amp). The DAC is the core-programmable element and the amplifier selection dictates the performance in terms of precision or speed. For an accurate, high precision, low noise application, a dual op amp such as the AD8066 can be used to provide the current-to-voltage conversion and the bipolar output.

Figure 1: Bipolar, Precision DC Conversion (Simplified Schematic)

CIRCUIT DESCRIPTION

Using a single op amp, this circuit can be configured to provide 2-quadrant multiplying operation. When a single op amp (A1) is connected, the output voltage of A1 is given by

VOUT (A1) = -VREF(D/2N)

where D is the digital word loaded to the DAC and N is the number of bits: D = 0 to 255 (8-bit AD5426), D = 0 to 1023 (10-bit AD5432), and D = 0 to 4095 (12-bit AD5443).

In some applications, it may be necessary to generate a full 4-quadrant multiplying operation or a bipolar output swing. This can easily be accomplished by using another external amplifier (A2) and some external resistors, as shown in Figure 1. In this circuit, the second amplifier, A2, provides a gain of 2. Biasing the external amplifier with an offset from the reference voltage results in a full 4-quadrant multiplying operation. The transfer function of this circuit shows that both negative and positive output voltages are created as the input data, D, is incremented from code zero (VOUT = − VREF) to midscale (VOUT = 0 V) to full scale (VOUT = + VREF). The equation for VOUT is given by

VOUT = VREF × (D/2N-1) − VREF

where D is the digital word loaded to the DAC and N is the number of bits: D = 0 to 255 (8-bit AD5426); D = 0 to 1023 (10-bit AD5432); and D = 0 to 4095 (12-bit AD5443).

This circuit uses the ADR01, which is a high accuracy, high stability, 10 V precision voltage reference. The reference is connected to the VREF input of the circuit in Figure 1. Because voltage reference temperature coefficient and long-term drift are primary considerations for applications requiring high-precision conversion, this device is an ideal candidate.

The supply voltage of the op amp limits the reference voltage that can be used with the DAC. An op amp’s bias current and offset voltage are both important selection criteria for precision current output DACs. Therefore, this circuit employs the AD8066 op amp, which has ultralow offset voltage (0.4 mV typical) and bias current (2 pA typical).

The input offset voltage of the op amp, A1, is multiplied by the variable noise gain (due to the code-dependent output resistance of the DAC) of the circuit. A change in this noise gain between two adjacent digital codes produces a step change in the output voltage due to the amplifier’s input offset voltage. This output voltage change is superimposed on the desired change in output between the two codes and gives rise to a differential linearity error that, if large enough, could cause the DAC to be nonmonotonic. In general, the input offset voltage should be a fraction of an LSB to ensure monotonic behavior when stepping through codes. For the 12-bit AD5443, the LSB size is 10 V/212 = 2.44 mV, while the input offset voltage of the AD8066 is only 0.4 mV.

Excellent grounding, layout, and decoupling techniques must be used for proper operation of the circuit. All power supply pins should be decoupled directly at the pin with a low inductance, 0.1 μF ceramic capacitor. The connection to ground should be directly to a large area ground plane. Additional decoupling using a 1 μF to10 μF electrolytic capacitor is recommended on each power supply where it enters the PC board. The decoupling capacitors are not shown in Figure 1 for simplicity.

COMMON VARIATIONS

The OP2177 is another excellent dual op amp candidate for the I-V conversion circuit. It also provides a low offset voltage (15 μV typical) and ultralow bias current (0.5 nA typical). The ADR02 and ADR03, with 5.0 V and 2.5 V output respectively, are other low noise references available from the same reference family as the ADR01. Another family of low noise references that would be suitable are the ADR441 and ADR445 products. Note that the value of the reference input voltage, VREF, is restricted by the rail-to-rail output voltage swing of the operational amplifier selected.

SAMPLE PRODUCTS USED IN THIS CIRCUIT

Product Description Available Product Models to Sample
AD5426 8-Bit High Bandwidth Multiplying DACs with Serial Interface AD5426YRMZ
AD5432 10-Bit High Bandwidth Multiplying DACs with Serial Interface AD5432YRMZ
AD5443 12-Bit High Bandwidth Multiplying DAC's with Serial Interface AD5443YRMZ
AD8066 High Performance, 145 MHz FastFET™ Op Amp AD8066ARZ AD8066ARMZ
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