CN0020: Interfacing the ADL5374 I/Q Modulator to the AD9779A Dual-Channel, 1 GSPS High Speed DAC

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OVERVIEW

Circuit Note PDF, 09/2010 (pdf, 127 kB)
Benefits & Features
  • Easy Interface between IQ modulator and TxDAC
  • Dual channel
  • 1 GSPS update rate
Products Used
    Applications: 
  • Communications
  • Radar
  • Communications

CIRCUIT FUNCTION AND BENEFITS

This circuit provides a simple, elegant interface between the ADL5374 I/Q modulator and the AD9779A high speed DAC. The ADL5374 and the AD9779A are well-matched devices because they have the same bias levels and similarly high signal-to-noise ratios (SNR). The matched bias levels of 500 mV allow for a "glueless" interface–there is no requirement for a level shifting network that would add noise and insertion loss along with extra components. The addition of the swing-limiting resistors (RSLI, RSLQ) allows the DAC swing to be scaled appropriately without loss of resolution or of the 0.5 V bias level. The high SNR of each device preserves a high SNR through the circuit.

Figure 1: Interface Between the AD9779A and ADL5374 with 50 Ω Resistors to Ground to Establish the 500 mV DC Bias for the ADL5374 Baseband Inputs (Simplified Schematic)

CIRCUIT DESCRIPTION

The ADL5374 is designed to interface with minimal components to members of Analog Devices family of TxDAC® converters (AD97xx). The baseband inputs of the ADL5374 require a dc common-mode bias voltage of 500 mV. With each AD9779A output swinging from 0 mA to 20 mA, a single 50 Ω resistor to ground from each of the DAC outputs provides the desired 500 mV dc bias. With just the four 50 Ω resistors in place, the voltage swing on each pin is 1 V p-p. This results in a differential voltage swing of 2 V p-p on each input pair.

By adding resistors RSLI and RSLQ to the interface, the output swing of the DAC can be reduced without any loss of DAC resolution. The resistor is placed as a shunt between each side of the differential pair, as shown in Figure 1. It has the effect of reducing the ac swing without changing the dc bias already established by the 50 Ω resistors.

The value of this ac swing-limiting resistor is chosen based on the desired ac voltage swing. Figure 2 shows the relationship between the swing-limiting resistor and the peak-to-peak ac swing that it produces when 50 Ω bias-setting resistors are used. Note that all Analog Devices I/Q modulators present a relatively high input impedance on their baseband inputs (typically >1 kΩ). As a result, the input impedance of the I/Q modulator will have no effect on the scaling of the DAC output signal.

Figure 2: Relationship Between the AC Swing-Limiting Resistor and the Peak-to-Peak Voltage Swing with 50 Ω Bias-Setting Resistors

It is generally necessary to low-pass filter the DAC outputs to remove image frequencies when driving a modulator. The above interface lends itself well to the introduction of such a filter. The filter can be inserted between the dc bias setting resistors and the ac swing-limiting resistor. Doing so establishes the input and output impedances for the filter.

A simulated filter example is shown in Figure 3 with a third-order elliptical filter with a 3 dB frequency of 10 MHz. Matching input and output impedances makes the filter design easier, so the shunt resistor chosen is 100 Ω, producing an ac swing of 1 V p-p differential for a 0 mA to 20 mA DAC full-scale output current. The simulated frequency response of this filter is shown in Figure 4. In a practical application, the use of standard value components along with the input impedance of the I/Q modulator (2900 kΩ in parallel with a few picofarads of input capacitance), will slightly change the frequency response.

Figure 3: DAC Modulator Interface with 10 MHz Third-Order, Low-Pass Filter (Calculated Component Values)
Figure 4: Simulated Frequency Response for DAC Modulator Interface with 10 MHz Third-Order Bessel Filter

All the power supply pins of the ADL5374 must be connected to the same 5 V source. Adjacent pins of the same name can be tied together and decoupled to a large area ground plane with a 0.1 μF capacitor. These capacitors should be located as close as possible to the device. The power supply can range between 4.75 V and 5.25 V.

The COM1 pin, COM2 pin, COM3 pin, and COM4 pin should be tied to the same ground plane through low impedance paths. The exposed paddle on the underside of the package should also be soldered to a low thermal and electrical impedance ground plane. If the ground plane spans multiple layers on the circuit board, they should be stitched together with nine vias under the exposed paddle. The AN-772 application note discusses the thermal and electrical grounding of the LFCSP_VQ in greater detail.

COMMON VARIATIONS

The interface described here can be used to interface any TxDAC converter with ground referenced 0 mA to 20 mA output currents to any I/Q modulator with a 0.5 V input bias level. For zero-IF applications, the AD9783 dual DAC provides an LVDS interface, while the CMOS-driven AD9788 dual DAC can generate a fine resolution complex IF input to the I/Q modulator. The ADL5370/ADL5371/ADL5372/ADL5373/ADL5374 family of I/Q modulators provides narrow-band operation with high output 1 dB compression point and OIP3, whereas the ADL5375 provides broadband high performance operation from 400 MHz to 6 GHz. The ADL5385 I/Q modula-tor uses a 2 × LO and operates from 50 MHz to 2.2 GHz.

SAMPLE PRODUCTS USED IN THIS CIRCUIT

Product Description Available Product Models to Sample
AD9779A Dual 16-Bit, 1 GSPS, Digital-to-Analog Converter AD9779ABSVZ
AD9788 Dual 16-Bit 800 MSPS DAC with Low Power 32-Bit Complex NCO

To obtain samples of this part, please contact ADI

ADL5374 3000 MHz TO 4000 MHz Quadrature Modulator

To obtain samples of this part, please contact ADI

ADL5385 30 MHz TO 2200 MHz Quadrature Modulator ADL5385ACPZ-R7
沪ICP备09046653号
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