- How come my A/D converter is not able to achieve full scale as the datasheet specifies?
ADC datasheets specify a common-mode voltage requirement for the analog inputs. Not much detailed information is available on this subject, but the proper front-end bias must be maintained in order to achieve rated performance at full scale.
ADCs with integrated buffers typically have an internally biased common-mode level of half the supply plus a diode drop (AVDD/2+0.7V). No external circuitry is required to bias this circuit, but it must be maintained to properly use the converter. For un-buffered (e.g., switched-capacitor input) converters, the common-mode bias is typically half the analog supply, or AVDD/2. This can be supplied externally in a variety of ways. Some converters have a dedicated pin that allows the designer to provide bias through a couple of resistors tied to the analog inputs. Alternatively, the designer can connect the internal bias to a transformer's center tap, or can use a resistor divider off the analog supply (a resistor from each leg of the analog inputs to AVDD and ground). Check the manufacturer's datasheet or applications support group before using the VREF pin, as many references are not equipped to supply a common-mode bias without an external buffer.
If the common-mode bias is not provided or maintained, the converter will have gain and offset errors that contribute to the overall measurement. The converter may "clip" early, or not at all because its full scale cannot be reached. Common-mode bias is especially important when connecting an amplifier in front of the converter, especially if the application calls for dc coupling (required for sampling dc or very low frequency signals). Check the amplifier's datasheet specifications to make sure the amplifier can meet the converter's swing and common-mode supply requirements. Converters have been pushing to smaller geometry processes and therefore lower supplies. With a 1.8-V supply, a 0.9-V common-mode voltage is required by the amplifier. Amplifiers with 3.3-V to 5-V supply voltages may not be able to maintain that low a level, but newer low-voltage amplifiers can.
Overlooking a converter's common-mode input voltage specification can cause havoc in any design. If multiple stages are used, the common-mode levels must be kept the same to prevent the two components from "fighting" each other. One will usually win, producing bogus measurements. For ac-coupled applications, use a coupling capacitor between the two stages to break the common-mode mismatches. This allows the design to optimize the bias of both the amplifier output and the ADC input.
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