High Speed ADC Evaluation Boards

Learn more about the evaluation kits Getting Started FPGA-Based Data Capture Kit - Documentation - Software FIFO-Based Data Capture Kit - Documentation - Software - Adapters Previous Data Capture Kits

Please select the ADC to evaluate:

See the list of all high speed ADCs and related eval boards

Getting Started

The data capture evaluation kits allow you to capture blocks of digital data from Analog Devices' high-speed analog-to-digital converter (ADC) evaluation boards. There are two types of data capture kits available: FIFO-based and FPGA-based. Refer to the chart shown on this page to determine which data capture kit is required to evaluate the ADC of interest.

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FPGA-Based Data Capture Kit
HSC-ADC-EVALCZ

Documentation

Technical notes are available in Adobe Acrobat Portable Document Format (PDF). To download the technical notes, select the links below:

High Speed ADC USB FPGA Evaluation Kit, EVALC (HSC-ADC-EVALCZ) (pdf, 2,147,463 bytes)

The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.

EVALC PC Board Gerber File (zip, 3,429,696 bytes)

Additional Info:

Understanding High Speed ADC Testing and Evaluation (pdf, 1,358,339 bytes)

Software

To download the VisualAnalog® software, select the link below:

VisualAnalog® (Rev. 1.9.4.3) (exe, 21.0 MB)

VisualAnalog® User's Guide (pdf, 2,175,422 bytes)

SPI Controller

The high speed ADC SPI program (SPIController.exe) allows the user to control advanced features on high speed, analog-to-digital converters (ADCs) with SPI capability. A complete list of features can be found in the specific product's data sheet and in Interfacing to High Speed ADCs via SPI® (pdf, 1,633,101 bytes).

High Speed ADC SPI Control Software (pdf, 599,590 bytes)

Microsoft .NET Framework 2.0 is required by parts of this program and should be installed if not already on the target machine.

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FIFO-Based Data Capture Kit
HSC-ADC-EVALB-DCZ (Dual Channel)

Documentation

Technical notes are available in Adobe Acrobat Portable Document Format (PDF). To download the technical notes, select the links below:

High Speed ADC USB FIFO Evaluation Kit, EVALB (HSC-ADC-EVALB-DCZ) (pdf, 1,050,702 bytes)

The HSC-ADC-EVALB-DCZ board is a FIFO-based data capture board that supports single, dual, and demulti-plexed SPI controllable ADC evaluation boards. This board is backwards compatible with ADC evaluation boards that are not SPI-controllable. It can simultaneously store the data from two ADC channels. The board is connected to the PC through a USB port and is used with ADC Analyzer to quickly evaluate the performance of high speed ADCs. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source.

EVALB PC Board Gerber File (zip, 268,677 bytes)

Additional Info:

Understanding High Speed ADC Testing and Evaluation (pdf, 1,358,339 bytes)

High Speed ADC SPI® Control Software User's Guide (pdf, 599,590 bytes)

Interfacing to High Speed ADCs via SPI® (pdf, 1,633,101 bytes)

Software

HSC-ADC-EVALB-DCZ can be used with either ADC Analyzer or VisualAnalog.

To download VisualAnalog software, select the link below:

VisualAnalog® (Rev. 1.9.4.3) (exe, 21.0 MB)

VisualAnalog® User's Guide (pdf, 2,175,422 bytes)

To download the ADC Analyzer™ software, select the link below:

AnalyzerSetup.EXE (Rev. 4.8.2) (exe, 16.7 MB)

ADC Analyzer User's Guide (pdf, 1,304,804 bytes)

3rd Party Solutions

EXP Analog Devices Adaptor Module
Avnet Electronics Marketing has partnered with Analog Devices to create an EXP adaptor module. This module allows users to connect any EXP-enabled FPGA baseboards to many of our high speed ADC evaluation boards. The EXP adaptor module connects to all ADC evaluation boards that are compatible with HSC-ADC-EVALB-DCZ. Customers who use the EXP adaptor module can use any EXP-enabled FPGA baseboard to replace HSC-ADC-EVALB-DCZ.

SPI Controller

High Speed ADC SPI® Control Software User's Guide (pdf, 599,590 bytes)

Microsoft .NET Framework 2.0 is required by parts of this program and should be installed if not already on the target machine.

Adapters

Some evaluation boards require an adapter to connect to the FIFO board. Refer to the table above to determine which adapter you will require. ADCs with parallel LVDS outputs may require an LVDS/CMOS translation board to mate to the HSC-ADC-EVALB-DCZ-DC. ADCs with serial LVDS outputs require a de-serializer. This de-serializer is called the HSC-ADC-FPGA. Refer to the chart above to determine if the evaluation board you are using will require this board.

If an adapter board is needed, contact highspeed.converters@analog.com with the part number of the adapter and a mailing address.

Documentation for Adapter Boards:

HSC-ADC-922XFFAZ

AD9051FFA

AD9283FFA

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High Speed De-Serialization Board
HSC-ADC-FPGA-4
HSC-ADC-FPGA-8Z

High speed ADC evaluation boards that support serial LVDS digital outputs also require the High Speed Deserialization board, HSC-ADC-FPGA. The high speed deserialization board captures up to four or eight channels of serial LVDS digital outputs and converts the data to standard parallel CMOS format. It supports quad analog-to-digital converterd (ADC) evaluation boards, enabling the user to connect to the Analog Devices FIFO-based data capture board (HSC-ADC-EVALB-DCZ-DC).

Documentation

HSC-ADC-FPGA-4 Documentation (Rev. B, 11/2005) (pdf, 990,548 bytes)

HSC-ADC-FPGA-8Z Documentation (Rev. C, 11/2006) (pdf, 2,103,836 bytes)

HSC-ADC-FPGA-4-Gerber File (zip, 789,962 bytes)

HSC-ADC-FPGA-8Z-Gerber File (zip, 532,980 bytes)

HSC-ADC-FPGA-4 Verilog Code & Xilinx Programming Files (zip, 69,632 bytes)

HSC-ADC-FPGA-8Z Verilog Code & Xilinx Programming Files (zip, 963,896 bytes)

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Previous Versions of the Data Acquisition Board
HSC-ADC-EVALA-XX
HSC-ADC-EVAL-XX

Documentation

High Speed ADC USB FIFO Evaluation Kit, EVALA (HSC-ADC-EVALA-SC/HSC-ADC-EVALA-DC) (Rev. 0, 5/2004)
(pdf, 2,149,419 bytes)
- Includes instructions on how to run ADC Analyzer with non-SPI controllable ADC evaluation boards.

EVALA PC Board Gerber File (zip, 485,762 bytes)

HSC-ADC-FPGA-9289 Verilog Code & Xilinx Programming Files (zip, 339,968 bytes)

HSC-ADC-FPGA-9229 Verilog Code & Xilinx Programming Files (zip, 188,416 bytes)

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High Speed ADC Eval Boards

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CU_High-Speed_ADC_FIFO_evaluation_tools.html

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