Analog Devices, Inc. | world leader in high performance signal processing

Application Notes (18)

AN-935: Designing an ADC Transformer-Coupled Front End (pdf, 363 kB)
AN-905: VisualAnalog Converter Evaluation Tool Version 1.0 User Manual (pdf, 2124 kB)
AN-878: High Speed ADC SPI Control Software (pdf, 585 kB)
AN-877: Interfacing to High Speed ADCs via SPI (pdf, 1594 kB)
AN-851: A WiMax Double Downconversion IF Sampling Receiver Design (pdf, 262 kB)
AN-835: Understanding High Speed ADC Testing and Evaluation (pdf, 985 kB)
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (pdf, 452,449 bytes) (pdf, 441 kB)
This application note describes the operation of a general-purpose, microcontroller-based Serial Port Interface (SPI) boot circuit.
- Software Download (zip, 21,702,560 bytes)
AN-808: Multicarrier CDMA2000 Feasibility (pdf, 1535 kB)
The goal of this application note is to determine the feasibility of implementing a multicarrier CDMA2000 transceiver and what the major subsystem performances must be.
AN-807: Multicarrier WCDMA Feasibility (pdf, 969 kB)
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (pdf, 291 kB)
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (pdf, 401 kB)
AN-741: Little Known Characteristics of Phase Noise (pdf, 1679 kB)
AN-737: How ADIsimADC Models an ADC (pdf, 373 kB)
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (pdf, 370 kB)
AN-586: LVDS Outputs for High Speed A/D Converters (pdf, 207 kB)
High Speed ADCs Uses LVDS (Low-Voltage Differential Signaling) to Minimize Performance Limitations In ADC Applications When Providing High Speed Data Output
AN-501: Aperture Uncertainty and ADC System Performance (pdf, 227 kB)
A Key Concern in IF Sampling is that of Aperture Uncertainty (Jitter)
AN-345: Grounding for Low-and-High-Frequency Circuits (pdf, 455 kB)
Know Your Ground and Signal Paths for Effective Designs. Current Flow Seeks Path of Least Impedance-Not Just Resistance....
AN-282: Fundamentals of Sampled Data Systems (pdf, 2131 kB)

Circuit Note (3)

Technical Articles (5)

ADIsim Design/Simulation Tools (3)

ADIsimADC
ADIsimADC is Analog Devices' Analog-to-Digital Behavioral Model that accurately models the typical performance characteristics of many of our High Speed Converters. The model faithfully reproduces the errors associated with both static and dynamic features such as AC linearity, clock jitter, and many other product specific anomalies.
ADIsimPLL™- Version 3.43
ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.
ADIsimRF
ADI’s ADIsimRF design tool provides calculations for the most important parameters within the RF signal chain, including cascaded gain, noise figure, IP3, P1dB, and total power consumption.

Data Sheets (2)

AD6657A: Quad IF Receiver Data Sheet (Rev 0, 10/2011) (pdf, 1711 kB)
ADL5565: 6 GHz Ultrahigh Dynamic Range Differential Amplifier Data Sheet (Rev C, 12/2012) (pdf, 640 kB)

Design & Integration Files (1)

CN0259 Design & Integration Files (zip, 747 kB)
- Schematic
- Bill of Materials
- Gerber Files
- Assembly Drawing

Documentation (5)

AD6657 S-Parameter Data (xls, 74 kB)
ADIsimADC
ADIsimADC is Analog Devices' Analog-to-Digital Behavioral Model that accurately models the typical performance characteristics of many of our High Speed Converters. The model faithfully reproduces the errors associated with both static and dynamic features such as AC linearity, clock jitter, and many other product specific anomalies.
ADL5565 Gerber Files (zip, 231 kB)
ADL5565: 6 GHz Ultrahigh Dynamic Range Differential Amplifier Data Sheet (Rev C, 12/2012) (pdf, 640 kB)
UG-232: Evaluating the AD6642/AD6657 Analog-to-Digital Converters (pdf, 2466 kB)