SUPPLEMENTAL RESOURCES - CN0109: Low Jitter Sampling Clock Generator for High Performance ADCs Using the AD9958/AD9858 500 MSPS/1GSPS DDS and AD9515 Clock Distribution IC

Application Notes (36)
Circuit Note (3)
Technical Articles (37)
ADIsim Design/Simulation Tools (3)
  • ADIsimADC
    ADIsimADC is Analog Devices' Analog-to-Digital Behavioral Model that accurately models the typical performance characteristics of many of our High Speed Converters. The model faithfully reproduces the errors associated with both static and dynamic features such as AC linearity, clock jitter, and many other product specific anomalies.
  • ADIsimCLK Design and Evaluation Software
    ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products. Whether your application is in wireless infrastructure, instrumentation, networking, broadband, ATE or other areas demanding predictable clock performance, ADIsimCLK will enable you to rapidly develop, evaluate and optimize your design.
  • ADIsimDDS™
    The purpose of this tool is to assist a user in selecting and evaluating Analog Devices, Direct Digital Synthesis (DDS) IC's. It allows a user to select a device, enter the desired operating conditions and evaluate it's general performance.
Aerospace Information (3)
  • Aerospace Dice  (pdf, 196 kB)
    (Revised 1/2006)
    Many Analog Devices products can be purchased as Class K die.
  • PCN#00-406  (pdf, 14 kB)
    (4/14/00)
    Product Change notice for change of Analog Devices, Inc. Aerospace Product Line standard product from 883 Class S to MIL-PRF-38535, level V.
  • Standard Space Level Products Program  (pdf, 39 kB)
    This brochure describes the standard flow and how to order Analog Devices, Inc. standard product for Space Level not available as JAN, or QML. It replaces the Standard Class S brochure.
Cross Reference Guides (3)
Data Sheets (13)
Design Handbooks (3)
Documentation (24)
FAQs/RAQs (152)
IBIS Models (11)
Overview (5)
Packages Application Notes (1)
Product Reviews (21)
Reference Design (1)
Software and Tools (1)
  • ADIsimCLK Design and Evaluation Software
    ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products. Whether your application is in wireless infrastructure, instrumentation, networking, broadband, ATE or other areas demanding predictable clock performance, ADIsimCLK will enable you to rapidly develop, evaluate and optimize your design.
Solutions Bulletins (1)
Tutorials (2)
User Guides (3)
Webcasts (2)
  • Fundamentals of Frequency Synthesis, Part 2: Direct Digital Synthesis (DDS)
    This month we conclude our two-part series on frequency synthesis, with an introduction to Direct Digital Synthesis. We will give a basic review of how a direct digital synthesis system works, touching on the inner workings of the DDS engine at a relatively high level. We will also discuss the tradeoffs between PLL and DDS technology as a base choice for frequency synthesis needs.
  • Performance Clocks: Demystifying Jitter
    Join us as we delve into the realm of sub-picosecond jitter clocks. The relationship between jitter and phase noise will be explored in detail and methods for measuring sub-picosecond jitter and ultra low phase noise will be presented and discussed.
Analog Dialogue (8)
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