3 MSPS,8-Bit ADC in 6-Lead TSOT
The conversion process and data acquisition are controlled using CS and the serial clock, allowing the devices to interface with microprocessors or DSPs. The input signal is sampled on the falling edge of CS, and the conversion is also initiated at this point. There are no pipeline delays associated with the part.
The AD7278 uses advanced design techniques to achieve very low power dissipation at high throughput rates.
The reference for the part is taken internally from VDD. This allows the widest dynamic input range to the ADC; therefore, the analog input range for the part is 0 to VDD. The conversion rate is determined by the SCLK
- 3 MSPS ADCs in a 6-lead TSOT package
- AD7476/AD7477/AD7478 and AD7476A/AD7477A/ AD7478A pin-compatible
- High throughput with low power consumption
- Flexible power/serial clock speed management. This allows maximum power efficiency at low throughput rates
- Reference derived from the power supply
- No pipeline delay. The parts feature a standard successive approximation ADC with accurate control of the sampling instant via a CS input and once-off conversion control.