The AD9874 connects directly to Analog Devices' programmable digital signal processors (DSPs). The figure below illustrates an example with the Blackfin™ series of ADSP-2153x processors. The Blackfin DSP series is the latest family of 16-bit products optimized for telecommunications applications with its dynamic power management feature making it well suited for portable radio products. The code-compatible family members share the fundamental core attributes of high performance, low power consumption, and the ease-of-use advantages of a microcontroller instruction set.

AD9874's synchronous serial interface (SSI) links the receive data stream to the DSP's Serial Port (SPORT). For AD9874 set-up and register programming, the device connects directly to ADSP-2153x's SPI-PORT. Dedicated select lines (SEL) allow the ADSP-2153x to program and read back registers of multiple devices using only one SPI port. Both SPI and SPORT transfers run in the background and generate interrupts on completion. To download the AD9874-to-ADSP-2153X interface code, select the following link: Blackfin™ Interface Code (zip, 27,318 bytes).

The AD9874 to SPORT interface works as follows. SPORT is configured in multi-channel, descriptor based DMA mode. Receive data gets automatically transferred to a DMA buffer (with programmable length). Once the buffer is filled, an interrupt is generated and a short software routine extracts the I-channel, Q-channel information and stores it into memory along with AD9874's gain and RSSI setting. When a programmable loop counter expires the received AD9874 waveform can be displayed using the plot window feature of the VisualDSP++ simulator software.

The AD9874's SSI interface provides a high degree of programmability allowing the number of data bits transferred within a single frame to be set to 32, 40, 48, or 64 bits. Also, it allows the output bit rate, f_CLKOUT, to be equal to the input clock rate, f_CLK, or some integer multiple fraction of it. One can download a simple graphical program (AD9874 SSI Interface (pdf, 394,240 bytes)) that shows the frame structure for different SSI interface settings.